(1) Field of the Invention
This invention relates to the fabrication of integrated circuit devices and more particularly to a method of forming contact or via metallurgy of about one micron feature size or less to devices in an integrated circuit structure.
(2) Description of the Prior Art
In current practice, there is a problem with poor step coverage of sputtered metal in contacts or via holes of high aspect ratio (defined as the ratio of depth of the opening to the diameter of the hole). In particular, problems occur when the opening is less than 1 micron in diameter and the aspect ratio is greater than 1.
Metallurgy by Chemical Vapor Deposition is not desirable because it requires significant capital investment and increase of process complexity. Sputtering will result in thinning of the metal at the sidewall of the contact/via when openings are small and of the order of 1 micron or less.
Workers in the field have used the lift off method for forming conductive lines on semiconductor and ceramic packaging surfaces. The U.S. Pat. Nos. 4,451,971 (Fairchild), 4,700,462 (Hughes), 4,687,541 (Rockwell) and 4,769,343 (Allied-Signal) describe such processes using vacuum evaporation as the deposition method. U.S. Pat. No. 4,584,761 (DEC) describes such lift off method using sputtering as the metal deposition technique. U.S. Pat. No. 4,696,098 gives extensive information on sputtering with narrow and deep trenches involving the coverage of the deposited layer.
Other workers in the field have attempted to use the lift off technique for contact deposition. These include U.S. Pat. Nos. 4,771,017 (Spire), 4,975,382 (Rohm) and 4,894,350 (Siemens). In all of these methods a reverse sloping resist mask opening is used which takes up horizontal real estate which in the past was not a problem, but in the one micron and below era this loss of real estate is not satisfactory.